About the role

Muon Space is looking for a Platform Engineer to own the shared technical foundation of our High Performance Compute (HPC) team. This is an engineering-track, individual-contributor role. You'll own the build flows, test environments, and delivery pipelines that turn FPGA and GPU engineering output into flight-ready artifacts, and the planning and reporting rhythm that keeps the team predictable across a growing portfolio of missions.

As Muon takes on more missions with more varied compute needs, your job is to keep the platform coherent while maximizing reuse across missions, minimizing variations, and making sure our delivery methods and planning methods evolve together.

This position is hybrid and requires working on-site in our San Jose, CA office three days per week.

Responsibilities

• Platform, Build & Delivery
• Maintain and evolve the technical build flows, test environments, and delivery and integration pipelines for both FPGA and GPU code, ensuring reproducible, reliable, and fast turnaround from commit to lab-ready artifact.
• Own the toolchain environments (synthesis, simulation, cross-compilation, containerized builds) and keep them up-to-date, documented, and consistent across engineers.
• Manage the complexity of delivering into a growing variety of future missions, actively working to keep mission-to-mission variations as small as possible, and promoting shared components.

• Planning, Delivery & the Intersection Between Them
• Operate at the intersection of delivery methods and planning methods, ensuring the way we plan reflects how we actually build and deliver, and that both evolve together as the team and mission portfolio grow.
• Own the team's roadmap in Jira: keep it accurate and trackable at all times; enable on-demand snapshot reporting that shows progress, priorities, and resource utilization.
• Partner with tech leads and engineers to estimate incoming work packages for upcoming missions and inbound requests from other teams and departments.
• Establish and track planning-accuracy metrics and use them to improve estimation quality.
• Publish weekly reports on the team's state of health: successes, risks, opportunities, blockers, and highlights: for team-internal and cross-company audiences and be the single source of truth for status, progress, and Jira reporting for the Onboard Compute organization.

• Knowledge & Enablement
• Own the team's Confluence space: keep it representative of the team's actual work and focus, and support engineers in contributing content.
• Partner with the engineering managers to maintain a comprehensive set of onboarding and training material, including tooling, build-flow, and platform documentation.

Required Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field, plus 3+ years of professional engineering experience.
• Hands-on development experience with FPGA and/or GPU workflows, including synthesis or compilation toolchains, simulation or profiling environments, and build/release pipelines. Direct experience on both is a strong plus; deep experience on one plus willingness to learn the other is acceptable.
• Experience owning or significantly contributing to build systems, test environments, and integration pipelines for embedded or hardware-adjacent codebases.
• Demonstrated ability to manage variation and complexity across multiple products, missions, or configurations, for example by defining shared components, reference flows, or platform contracts that reduce one-off work.
• Comfort scripting to automate toolchains, orchestrate pipelines, and generate reports.
• Demonstrated fluency with Jira (structuring epics/stories, dashboards, JQL, reporting) and Confluence.
• Proven ability to drive estimation and planning discussions with engineers, and to translate technical work into clear roadmaps and reports for non-engineering stakeholders.
• Excellent written and verbal communication skills, with a talent for making complex work legible to executives, adjacent teams, and new hires.

Nice-to-Have Skills

• Prior role as a Platform, Engineering Productivity, Developer Experience, DevOps, or Build/Release engineer supporting an FPGA, embedded, or GPU team.
• Hands-on experience with FPGA build flows (Vivado, Quartus, or similar) and/or GPU cross-compilation for embedded platforms (e.g., NVIDIA Jetson/IGX-class).
• Experience managing a shared platform, product line, or reference design across multiple downstream consumers or missions.
• Experience with hardware-in-the-loop test automation and lab-bench regression infrastructure.
• Familiarity with containerization and development pipeline tooling.
• Prior exposure to space, aerospace, or other mission-critical engineering environments.

Salary

The salary range for this role is $190,000 - $212,000, plus a competitive equity grant and comprehensive benefits package. Final compensation will be determined based on skills, qualifications, experience, and geographic location as assessed during the interview process.