Role Impact

Responsibilities

• Lead block- and chip-level specification development for related analog subsystems.
• Define circuit architectures for power management, clocking, data-conversion, or comparable mixed-signal functions.
• Perform transistor-level design and verification for complex, high-risk analog blocks.
• Conduct or technically supervise layout, extraction, and post-layout closure.
• Lead design reviews and resolve cross-block technical issues.
• Define robust analog/digital interfaces in partnership with architecture, RTL, and verification teams.
• Guide Staff and Senior engineers through technical reviews and day-to-day design decisions.
• Develop prototype-silicon validation and characterization strategies.
• Define manufacturing test requirements and support efficient test-program development.
• Work with product, test, applications, and marketing teams on product definition, production issues, and complex customer problems.
• Drive designs from initial requirements through production release.

Qualifications

• BS or MS in Electrical Engineering, Computer Engineering, or related field.

• Demonstrated ownership of complex analog subsystems from specification through production.

• At least 8 years of experience in analog or mixed-signal IC design with multiple completed silicon design cycles.
• Deep transistor-level design and verification expertise in at least one relevant area, such as power management, clocking, or data converters.
• Strong understanding of analog layout, parasitics, matching, noise, variation, reliability, and advanced-node design constraints.
• Experience with post-silicon bring-up, characterization, debug, and manufacturing test.
• Ability to lead architecture and design decisions across teams without relying on formal authority.
• Effective collaboration with digital, physical-design, product, test, applications, and systems teams.
• Experience mentoring senior engineers and improving the quality of design reviews.
• Current authorization to work in the United States for any employer.
• Must be willing to come into an office in NW Austin 5 days a week.

Preferred Qualifications

• Ultra-low-power, battery-constrained, or subthreshold circuit-design experience.
• Design experience at 22nm or below.
• Breadth across PMU, clocking, and data-converter subsystems.
• Experience supporting multiple products or concurrent tapeouts.
• Familiarity with MCU, wearable, medical, edge-AI, wireless, or sensor-oriented SoCs.

Why Ambiq