Additionalinformation

Additional Information

Compensation and Benefits

$200,000–$250,000 base salary plus equity, bonus, and benefits.

Axiado is an Equal Opportunity Employer. Employment decisions are based on qualifications, merit, and business needs.

Companydescription

Company Description

MAKE YOUR MARK. SECURE THE AI REVOLUTION.

About Axiado

Axiado builds hardware-rooted, AI-driven security and management silicon to make data centers more secure, efficient, and reliable. Its Trusted Control/Compute Unit (TCU) anchors an Intelligent Hardware Management Fabric that monitors and protects every component in the rack from below the OS.

Jobdescription

Job Description

Position Overview

At Axiado, we are redefining security, platform management, and energy efficiency for AI and cloud data centers. As Director of Product Management, you will own the multi-year roadmap and commercial strategy for our Trusted Control/Compute Unit (TCU) SoCs, Platform Intelligence Controllers (PIC), and DC-SCM modules—driving flagship products from initial definition to silicon bring-up.

You will lead a lean team of Technical Product Managers while personally authoring core specs, building TCO models, and leading technical architecture deep-dives with hyperscalers and Tier-1 OEMs/ODMs.

Key Responsibilities

• Product Definition: Author flagship PRDs and MRDs, translating customer workloads into granular hardware, firmware, and on-chip AI specifications.
• Portfolio & TCO Strategy: Own the multi-generational TCU/PIC roadmap, pricing, and P&L. Build bottom-up TCO and power-savings models proving rack-level ROI.
• Team Leadership: Mentor and scale a lean team of PMs, setting the bar for technical rigor through active spec reviews and direct execution.
• Hyperscaler & Ecosystem Design-Wins: Lead technical and commercial engagements with CSPs, Tier-1 OEMs/ODMs, and silicon partners (Arm, NVIDIA, x86) to secure design-wins and shape OCP standards.
• Cross-Functional Co-Design: Partner daily with Silicon, Firmware, and AI Engineering on Performance-Power-Area (PPA), Dynamic Voltage & Frequency Scaling (DVFS), Hardware Root of Trust (RoT), and out-of-band telemetry.
• End-to-End Execution: Drive silicon from concept through tape-out, post-silicon bring-up, customer sampling, and production ramp alongside FAE, Marketing, and Operations.

Qualifications

Required Qualifications

• Education: BS in EE, CE, CS, or related technical field; MS, PhD, or MBA preferred.
• Experience: 10–12+ years in semiconductor product management, silicon architecture, or systems engineering, including 3+ years leading and mentoring PMs.
• Proven Silicon Track Record: Driven at least two complex SoCs or ASICs from initial PRD through tape-out and volume production.
• Domain Mastery: 5+ years of deep expertise in data center hardware—specifically BMCs, Hardware Root of Trust (RoT), DC-SCM modules, SmartNICs/DPUs, or network switches.
• Technical Fluency: Comfortable whiteboarding with principal architects; strong command of server management, out-of-band telemetry, OCP specs, and low-level interfaces (PCIe, eSPI, MCTP, LTPI).
• Commercial & Executive Agility: Proven ability to win hyperscale and Tier-1 designs while pivoting effortlessly from datasheet reviews to executive pitches.

Preferred Qualifications

• Experience with AI-driven hardware telemetry, dynamic power/thermal management (DVFS), or predictive threat detection.
• Experience with post-silicon bring-up, evaluation boards, and OpenBMC stacks.
• Existing network across cloud architects and Tier-1 server ODMs.